8280511: AArch64: Combine shift and negate to a single instruction

In AArch64,

asr     x10, x1, #31
neg     x0, x10

can be optimized to:

neg    x0, x1, asr #31

To implement the instruction combining, we add matching rules in
the backend.

Change-Id: Iaee06f7a03e97a7e092e13da75812f3722549c3b